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Multi-core Processors MCQs: 58 Questions & Answers in Engineering

58 Multi-core Processors MCQs in Engineering with answers & explanations. Practice objective questions for competitive exams, interviews & self-assessment —… Use the answer toggle below to show or hide all solutions, tap an option to check one question, or open a question for its own page.

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Multi-core Processors MCQs: 58 Questions & Answers in Engineering

The idea of cache memory is based

Systems that do not have parallel processing capabilities are

Parallel programs: Which speedup could be achieved according to Amdahl´s law for infinite number of processors if 5% of a program is sequential and the remaining part is ideally parallel?

In shared bus architecture, the required processor(s) to perform a bus cycle, for fetching data or instructions is

Alternative way of a snooping-based coherence protocol, is called a

If no node having a copy of a cache block, this technique is known as

All nodes in each dimension form a linear array, in the .

tasks being performed in different stages :

The expression 'delayed load' is used in context of

Producer consumer problem can be solved using

During the execution of the instructions, a copy of the instructions is placed in the .

A situation where several processes access and manipulate the same data concurrently and the outcome of the execution depends on the particular order in which access takes place is called:

Which one of the following statements describes the properties achieved?

To avoid deadlock

All deadlocks involve conflicting needs for

Spinlocks are intended to provide only.

processes to solve the critical section problem.

A semaphore is a shared integer variable .

A critical section is a program segment .

How many times will process P0 print '0'?

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